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| NTB125N02R, NTP125N02R Power MOSFET 125 A, 24 V N-Channel TO-220, D2PAK Features * Planar HD3e Process for Fast Switching Performance * Body Diode for Low trr and Qrr and Optimized for Synchronous * * * Operation Low Ciss to Minimize Driver Loss Optimized Qgd and RDS(on) for Shoot-through Protection Low Gate Charge http://onsemi.com 125 AMPERES, 24 VOLTS RDS(on) = 3.7 mW (Typ) D MAXIMUM RATINGS (TJ = 25C Unless otherwise specified) Parameter Drain-to-Source Voltage Gate-to-Source Voltage - Continuous Thermal Resistance - Junction-to-Case Total Power Dissipation @ TC = 25C Drain Current - Continuous @ TC = 25C, Chip Continuous @ TC = 25C, Limited by Package Continuous @ TA = 25C, Limited by Wires Single Pulse (tp = 10 ms) Thermal Resistance - Junction-to-Ambient (Note 1) Total Power Dissipation @ TA = 25C Drain Current - Continuous @ TA = 25C Thermal Resistance - Junction-to-Ambient (Note 2) Total Power Dissipation @ TA = 25C Drain Current - Continuous @ TA = 25C Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = 50 Vdc, VGS = 10 Vdc, IL = 15.5 Apk, L = 1 mH, RG = 25 W) Maximum Lead Temperature for Soldering Purposes, 1/8 from Case for 10 Seconds Symbol VDSS VGS RqJC PD ID ID ID ID RqJA PD ID RqJA PD ID TJ, Tstg EAS Value 24 20 1.1 113.6 125 120.5 95 250 46 2.72 18.6 63 1.98 15.9 -55 to 150 120 Unit Vdc Vdc C/W W A A A A C/W W A C/W W A C mJ 2 13 TL 260 C 125N2 Y WW = Specific Device Code = Year = Work Week 4 D2PAK CASE 418AA STYLE 2 125N2 YWW S G MARKING DIAGRAMS TO-220AB CASE 221A STYLE 5 4 125N2R YWW 1 2 3 1. When surface mounted to an FR4 board using 1 inch pad size, (Cu Area 1.127 in2). 2. When surface mounted to an FR4 board using minimum recommended pad size, (Cu Area 0.412 in2). ORDERING INFORMATION Device Package D2PAK D2PAK TO-220AB Shipping 50 Units/Rail 800/Tape & Reel 50 Units/Rail PIN ASSIGNMENT PIN 1 2 3 4 FUNCTION Gate Drain Source Drain NTB125N02R NTB125N02RT4 NTP125N02R For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. (c) Semiconductor Components Industries, LLC, 2003 1 October, 2003 - Rev. 4 Publication Order Number: NTB125N02R/D NTB125N02R, NTP125N02R ELECTRICAL CHARACTERISTICS (TJ = 25C Unless otherwise specified) Characteristics OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (Note 3) (VGS = 0 Vdc, ID = 250 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 20 Vdc, VGS = 0 Vdc) (VDS = 20 Vdc, VGS = 0 Vdc, TJ = 125C) Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (Note 3) (VDS = VGS, ID = 250 mAdc) Threshold Temperature Coefficient (Negative) Static Drain-to-Source On-Resistance (Note 3) (VGS = 10 Vdc, ID = 110 Adc) (VGS = 4.5 Vdc, ID = 55 Adc) (VGS = 10 Vdc, ID = 20 Adc) (VGS = 4.5 Vdc, ID = 20 Adc) Forward Transconductance (Note 3) (VDS = 10 Vdc, ID = 15 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (VGS = 4.5 Vdc, ID = 40 Adc, VDS = 10 Vdc) (Note 3) SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage (IS = 20 Adc, VGS = 0 Vdc) (Note 3) (IS = 55 Adc, VGS = 0 Vdc) ( (IS = 20 Adc, VGS = 0 Vdc, TJ = 125C) VSD - - - - - - - 0.82 0.99 0 65 0.65 36.5 17.7 18.8 0.024 1.2 - - - - - - mC Vdc (VGS = 10 Vdc, VDD = 10 Vdc, ID = 40 Adc, RG = 3 W) td(on) tr td(off) tf QT Q1 Q2 - - - - - - - 11 39 27 21 23.6 5.1 11 22 80 40 40 28 - - nC ns ( (VDS = 20 Vdc, VGS = 0 V, f = 1 MHz) , ) Ciss Coss Crss - - - 2710 1105 227 3440 1670 640 pF VGS(th) 1.0 - RDS(on) - - - - gFS - 44 - 3.7 4.9 3.7 4.7 - - 4.6 6.2 Mhos 1.5 5.0 2.0 - Vdc mV/C mW V(BR)DSS 25 - IDSS - - IGSS - - - - 1.5 10 100 nAdc 28 15 - - Vdc mV/C mAdc Symbol Min Typ Max Unit Reverse Recovery Time (IS = 30 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) (Note 3) Reverse Recovery Stored Charge 3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. trr ta tb QRR ns http://onsemi.com 2 NTB125N02R, NTP125N02R 200 4.0 V 160 4.5 V 5.0 V 6.0 V 8.0 V 10 V ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) 3.5 V 200 VDS 10 V 160 120 3.0 V 120 80 VGS = 2.5 V 40 0 0 2 4 6 8 10 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 80 TJ = 125C TJ = 25C 40 0 0 0.8 TJ = -55C 1.6 2.4 3.2 4.0 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE () RDS(on), DRAIN-TO-SOURCE RESISTANCE () Figure 2. Transfer Characteristics 0.01 VGS = 10 V 0.008 TJ = 125C 0.006 TJ = 25C 0.004 TJ = -55C 0.002 0 40 80 120 160 200 ID, DRAIN CURRENT (AMPS) 0.01 VGS = 4.5 V 0.008 TJ = 125C 0.006 TJ = 25C 0.004 TJ = -55C 0.002 0 40 80 120 160 200 ID, DRAIN CURRENT (AMPS) Figure 3. On-Resistance versus Drain Current and Temperature RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -50 10 -25 0 25 50 75 100 125 150 0 ID = 55 A VGS = 4.5 V IDSS, LEAKAGE (nA) 10,000 100,000 Figure 4. On-Resistance versus Drain Current and Temperature VGS = 0 V TJ = 150C TJ = 125C 1000 TJ = 100C 100 4.0 8.0 12 16 20 24 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current versus Voltage http://onsemi.com 3 NTB125N02R, NTP125N02R VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 7000 6000 C, CAPACITANCE (pF) 5000 4000 3000 2000 Crss Ciss VDS = 0 V VGS = 0 V 10 8.0 VGS 6.0 QT Q1 Q2 ID = 40 A TJ = 25C 0 8 16 24 32 40 48 Ciss 4.0 Coss 1000 0 10 TJ = 25C 5 VGS 0 VDS 5 10 15 Crss 20 2.0 0 Qg, TOTAL GATE CHARGE (nC) GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation Figure 8. Gate-to-Source and Drain-to-Source Voltage versus Total Charge 60 IS, SOURCE CURRENT (AMPS) 1000 VDS = 10 V ID = 40 A VGS = 10 V t, TIME (ns) 50 40 30 20 10 0 VGS = 0 V TJ = 25C 100 tr td(off) tf 10 1 td(on) 10 RG, GATE RESISTANCE () 100 0 0.2 0.4 0.6 0.8 1.0 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance 1000 ID, DRAIN CURRENT (AMPS) VGS = 20 V SINGLE PULSE TC = 25C 100 Figure 10. Diode Forward Voltage versus Current 100 ms 1 ms 10 RDS(on) Limit Thermal Limit Package Limit 0.1 1.0 10 10 ms dc 1.0 100 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 NTB125N02R, NTP125N02R 1 EFFECTIVE TRANSIENT THERMAL RESPONSE (NORMALIZED) Normalized to RJC at Steady State 0.1 r(t), 0.01 0.00001 0.0001 0.001 0.01 t, TIME (s) 0.1 1 10 Figure 12. Thermal Response PACKAGE DIMENSIONS TO-220AB CASE 221A-09 ISSUE AA -T- B 4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 --- --- 0.080 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 --- --- 2.04 F T S C Q 123 A U K H Z L V G D N R J STYLE 5: PIN 1. 2. 3. 4. http://onsemi.com 5 NTB125N02R, NTP125N02R PACKAGE DIMENSIONS D2PAK CASE 418AA-01 ISSUE O C E -B- 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.036 0.045 0.055 0.310 --- 0.100 BSC 0.018 0.025 0.090 0.110 0.280 --- 0.575 0.625 0.045 0.055 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.92 1.14 1.40 7.87 --- 2.54 BSC 0.46 0.64 2.29 2.79 7.11 --- 14.60 15.88 1.14 1.40 V W A 1 2 3 S -T- SEATING PLANE K G D 3 PL 0.13 (0.005) J W DIM A B C D E F G J K M S V M TB M VARIABLE CONFIGURATION ZONE U STYLE 2: PIN 1. 2. 3. 4. M M M F VIEW W-W 1 F VIEW W-W 2 F VIEW W-W 3 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 6 NTB125N02R/D |
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